The present invention relates to memory technology and specifically to memories which employ giant magnetoresistance to access magnetically stored information.
Semiconductor random access memory (RAM) is well known to those of skill in the art. RAM generally comprises a set of memory cells integrated on a chip with a number of peripheral circuits. RAMs are described in, for example, Porat et al., Introduction to Digital Techniques, John Wiley, 1979, the entirety of which is incorporated herein by reference for all purposes. In general, RAM circuits perform several functions, including addressing (selection of specific locations for access), providing power, fanout (transmission of a signal to a multiplicity of loads), and conditioning required to generate a useable output signal. In RAM memories, the addressing scheme permits random access to the desired cell, with access time being independent of the cell location. Selected portions are then extracted for use. RAMs are generally fast enough to be compatible with a CPU, but they are generally too expensive to be used for mass storage. Further, both static RAMs (SRAMs) and dynamic RAMs (DRAMs) are volatile in the sense that their contents are lost when the power to the memory is lost. DRAMs also require periodic refreshing. It is not practical, therefore, to use either DRAMs or SRAMs for long-term storage.
Electronically programmable read only memory (EPROM) and read only memory (ROM) are nonvolatile alternatives to RAM. However, while such memories do not require a refresh cycle, they have the obvious disadvantage of being programmable only once. Other nonvolatile semiconductor memories that can be written repeatedly, such as electrically alterable read only memory (EAROM) or electrically erasable read only memory (EEROM), or FLASH (an application-optimized EPROM), do not provide nearly the reliability of magnetic memories for long-term storage.
Semiconductor memory technologies are rapidly approaching fundamental limits in their further advances. The technical difficulties facing the semiconductor memory industry are well summarized in Paul Packan""s paper Pushing the Limits, Science, Sep. 24, 1999, p. 2079, the entirety of which is incorporated herein by reference for all purposes.
In view of the foregoing disadvantages of traditional memories, developers of memory technology are increasingly looking toward alternatives such as magnetoresistance and giant magnetoresistance (GMR) as the bases for an entirely new paradigm in information storage. GMR refers to the difference in the resistance that conduction electrons experience in passage through magnetic multi-layer films (comprising alternating magnetic and nonmagnetic metal layers) depending on the relative orientation of the magnetization M in successive magnetic layers. Some of the magnetic layers may be used for storage, some for readout, some for both storage and readout, and others as keepers. In fact, even the readout layers may store information briefly for part of a read-cycle time. To distinguish the keeper layer from those layers that store information, whether for only part of a cycle or after completion of a cycle, we shall hereinafter refer to all but the keeper (and insulator) layers as xe2x80x9cstorage layers.xe2x80x9d
GMR in magnetic films arises from an energy gap between conduction electrons whose spin is parallel to a magnetization vector and those whose spin is anti-parallel to the magnetization vector. The larger the magnetization, the larger the giant magnetoresistance. Examples of memory technology based on GMR are described in U.S. Pat. No. 5,587,943 for NONVOLATILE MAGNETORESISTIVE MEMORY WITH FULLY CLOSED FLUX OPERATION issued on Dec. 24, 1996, the entire disclosure of which is incorporated herein by reference for all purposes. An example of the operation of a memory cell based on such techniques will now be described with reference to FIG. 1.
FIG. 1 shows the major hysteresis loop of a GMR exchange-coupled triple-layer film. Two magnetic layers 130 and 134 are separated by a nonmagnetic layer 132. The two magnetic layers have coercivities Hc that differ by more than the exchange coupling between them such that layer 130 has a high coercivity and layer 134 has a low coercivity. Film cross sections 136 show the magnetization at each part of the loop.
Beginning at the upper right quadrant, both top and bottom layers 130 and 134 are saturated in the same direction. If the applied field H is reduced to substantially zero and then reversed in direction, the layer having the lower coercivity switches first, as shown by the cross section in the upper left quadrant. The switching occurs when the field is equal to the sum of the coercivity of the lower coercivity layer plus the coupling field.
As the applied field H is increased in the negative direction, the layer having a higher coercivity switches directions, as depicted in the lower left quadrant. This switching occurs when the field magnitude is equal to the coercivity of the higher-coercivity layer less the value of the exchange coupling. Thus, switching is carried out in such films in a two-step process.
Readout of the memory cell of FIG. 1 is achieved in a nondestructive fashion by measuring the resistance change in response to the change in the magnetization obtained by applying a field from one of the word lines. The application of the field temporarily switches the lower-coercivity layer. In this example, in which exchange bias exceeds the coercivity of the lower-coercivity layer, this layer resets or switches back when the current in the word line is discontinued. FIGS. 2a and 2b depict the resistive signals 180 when a triangular word current 182 is applied. FIG. 2a shows the signal corresponding to a xe2x80x9czeroxe2x80x9d state and FIG. 2b shows the signal corresponding to a xe2x80x9conexe2x80x9d state.
In addition to obvious advantages relating to persistence and reliability, memories based on GMR technology have achieved densities comparable to and exceeding that of conventional semiconductor memories. However, it is desirable to achieve still higher densities.
According to the present invention, techniques are provided by which individual GMR memory cells are configured to store multiple bits of information. That is, the present invention provides a multi-layered memory cell having a plurality of magnetic layers, each of the magnetic layers being for magnetically storing one bit of information. A plurality of access lines are integrated with the plurality of magnetic layers and configured such that the bits of information stored in each of selected ones of the magnetic layers may be independently accessed using selected ones of the plurality of access lines and the giant magnetoresistive effect. The memory cell further includes at least one keeper layer. The storage layers, the access lines, and the at least one keeper layer form a substantially closed flux structure.
A further understanding of the nature and advantages of the present invention may be realized by reference to the remaining portions of the specification and the drawings.